Talk Title:

Escaping the sandbox: Side Channel Shenanigans on Our DIY Chip

Abstract:

Building hardware is hard, especially for people used to breaking hardware. In this talk, we will share our journey of creating a chip specifically designed for testing our security tools and techniques. We will discuss the process of hardening a picorv32 core against fault injection using techniques like gate-level simulation and triple modular redundancy (TMR).

We will also present our analysis of the AES cores we included in the chip, which had various countermeasures applied to them.

We will show how we were able to extract the keys using side-channel analysis and discuss the importance of testing hardware security in the real world. Finally, we will reflect on the lessons we learned from this project and the value of being able to both build and break hardware. This talk is intended for security researchers, hardware enthusiasts, and anyone interested in the cat-and-mouse game of hardware security.

Speaker Bio:

Jasper (@jzvw)is the CTO of Riscure North America, where he leads a team of security analysts and innovators working to improve the security of embedded devices. Jasper is a renowned expert in the field of hardware security, with extensive experience in design review, logical testing, side channel analysis, and fault injection attacks. He is also the co-author of the "Hardware Hacking Handbook: Breaking Embedded Security with Hardware Attacks", together with Colin O'Flynn.